View AUIR3330STRL_8505433.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

auir3330s 1 www.irf.com ? 2012 international rectifier may 29, 2014 automotive grade protected high frequency high side switch features up to 30khz pwm switching capability charge pump for dc operation active di/dt control to reduce emi load current feedback short-circuit protection programmable over current shutdown over temperature shutdown diagnostic feedback under voltage shutdown gnd, in and bootstrap pin loss protection e.s.d protection low power mode lead -free, rohs compliant applications fan engine cooling air conditioning blower pumps (oil, fuel, water) compressor package d2pak - 7 leads description the auir3330s is a 7 terminals high side switch for variable speed dc motor. it fea tures simplify the design of the dc motor drive with a microcontroller. the mosfet switches the power load proporti onally to the input signal duty cycle at the same frequency and provides a current feedback on the ifbk pi n. the over-current shutdown is programmable from 5a to 50a. over-current, over-temperature latch off the power swi tch and provide a digital diagnostic status on the input pin. in sleep mode, the device consumes typically less then 1ua. further integrated protections such as esd and gnd disconnect protection guarantee safe operation in harsh conditions of the automotive environment. typical connection with reverse battery protection downloaded from: http:///
auir3330s 2 www.irf.com ? 2012 international rectifier may 29, 2014 qualification information ? qualification level automotive (per aec-q100) comments: this family of ics has passed an automotive qualification. irs industrial and consumer qualification level is granted by extension of the higher automotive level. moisture sensitivity level msl1 260c (per ipc/jedec j-std- 020) esd machine model class m3 (+/-350v) (per aec-q100- 003) human body model class h4 (+/-4000v) ( per aec-q100- 002 ) charged device model class c4 (pass +/- 1000v ) (per aec-q100- 011) ic latch-up test class ii level a (per aec-q100- 004) rohs compliant yes ? qualification standards can be found at international rect ifiers web site http://www.irf.com/ downloaded from: http:///
auir3330s 3 www.irf.com ? 2012 international rectifier may 29, 2014 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond whi ch damage to the device may occur. (tj= -40c..150c, vcc=6..18v unless otherwise specified). symbol parameter min. max. units vout maximum drain to source voltage gnd- 5v vcc+0.3 v vin maximum input voltage - 0.3 5.5 v vcc max. maximum vcc voltage ? 36 v vcc cont maximum continuous vcc voltage ? 28 v iin max. maximum input current - 0.3 10 ma ifb max maximum ifb current - 50 10 ma pd maximum power dissipation rth=60c/w tambient=25c, tj=150c rth=40c/w d2pack 6cm2 footprint ? 2.5 w tj max. max. storage & operating temperature junction temperature - 40 150 c thermal characteristics symbol parameter typ. max. units rth1 thermal resistance junction to ambient d2pak std footprint 60 ? c/w rth2 thermal resistance junction to ambient d2pak 6cm2 footprint 40 ? rth3 thermal resistance junction to case d2pak 0.65 ? recommended operating conditions these values are given for a quick design. symbol parameter min. max. units vcc op. operating voltage range 6 18 v iout dc output current tj=145c, tamb=85c, rth=5c/w ? 45 a cboot bootstrap capacitor 100 220 nf cd1 decoupling ceramic capacitor 100 ? nf cd2 decoupling ceramic capacitor 2.2 ? f r in recommended resistor in series with in pin 1 5 k ? rp diag recommended resistor in series with in pin to read the diagnostic 10 50 k ? cifb recommended ifb filter capacitor 1 2.2 nf rifb recommended resistor to program over current shutdown 0.6 5 k ? rp ifb recommended resistor in series with rifb pin to read the current feedback 10 25 k ? f max. maximum recommended input frequency, duty cycle=10% to 90% ? 30 khz downloaded from: http:///
auir3330s 4 www.irf.com ? 2012 international rectifier may 29, 2014 static electrical characteristics -40c < tj < 150c, 6v < vcc < 18v, (unless otherwise specified) symbol parameter min. typ. max. units test conditions rds on on state resistance tj=25c ? 3 3.5 m ? iout=30a on state resistance tj=150c 1 ? 5.5 6.2 iout=30a rds on lv on state resistance low voltage tj=25c ? 3 3.5 m ? iout=15a vcc=6v vf mos forward voltage of the mosfet body diode 0.6 ? 1.1 v iout = -50a vbrk out breakdown voltage between vcc and vout (mosfet body diode) 39 40 ? v i vcc slp supply current in sleep mode (ic + mosfet leakage) ? 1 2 a vin=0v vcc = 14v tj = 25c i bias boot bootstrap regulator biasing current (flows through the output) ? 5.5 14 ma vout = 0v i vcc wke vcc current when the device is woken up (ic + ibias boot) ? 14 20 ma i_boot = 0a vout = 0v v in wke input threshold voltage to wake up the device 0.35 0.75 1.3 v v in off in voltage threshold to turn off 1.9 2.2 ? v v in on in voltage threshold to turn on ? 2.8 3.2 v v in hyst input threshold hysteresis 0.4 ? 0.7 v c in input pin capacitor - 10 - pf i in on on state input current 10 20 30 a vin = 5v i bt chrge bootstrap current charge 0.4 ? 1.5 a vout = 0v cboot =500nf v bt chrge bootstrap voltage 4.9 5.5 6.3 v cboot =500nf guaranteed by design. downloaded from: http:///
auir3330s 5 www.irf.com ? 2012 international rectifier may 29, 2014 switching electrical characteristics -40c < tj < 150c, 6v < vcc < 18v, rin = 5k ? (unless otherwise specified) symbol parameter min. typ. max. units conditions td vout on turn-on output voltage delay time 0.7 1 1.4 s between 50% of in and 30% of vout, iout = 14a tr vout ouput voltage rise time 500 800 1300 ns between 15% and 85%; vcc = 14v, iout=14a tr iout ouput current rise time 0.7 1.2 1.85 s between 5a and 40a; vcc = 14v, iout=45a dv/dt on turn on dv/dt 10 20 28 v/s between 25% and 70%; vcc = 14v di/dt on turn on di/dt 21 40 51 a/s between iout 15a and 35a; vcc = 14v td vout off turn-off delay time 0.9 1.2 1.7 s between 50% of in and 90% of vout, iout = 14a tf vout output voltage fall time 250 430 650 ns between 90% and 10%; vcc = 14v, iout=14a tf iout output current fall time 0.55 1 1.45 s between 40a and 5a; vcc = 14v, iout=45a dv/dt off turn off dv/dt 28 50 67 v/s between 30% and 70%; vcc = 14v di/dt off turn off di/dt 30 40 51 a/s between iout 35a and 15a; vcc = 14v t trfct ld input output transfer function for low duty cycle 8.5 10 11.5 s iout = 1a; in pulse time =10s t trfct hd input output transfer function for high duty cycle 38.5 39.5 40.5 s iout = 1a; in pulse time =40s t off min minimum off time to recharge the bootstrap capacitor ? ? 2 s cboot = 100nf downloaded from: http:///
auir3330s 6 www.irf.com ? 2012 international rectifier may 29, 2014 protection characteristics -40c < tj < 150c, 6v < vcc < 18v (unless otherwise specified). symbol parameter min. typ. max. units conditions vth ifb ifb over current threshold voltage 3.65 4 4.35 v isd fix maximum internal over current shutdown 55 70 90 a isd prog 2 programmable current shutdown 11 17 24 a rifb = 1.5k ? isd prog 1 programmable current shutdown 30 40 50 a rifb = 640 ? tsd over temperature threshold 2 150 165 175 c vth vds ovp vds threshold to activate the over power protection ? 0.75 ? v tj=25c td vds ovp vds delay to turn off after ovp detection 6 10 15 s uv on under voltage threshold to turn on ? 5.3 6.3 v uv off under voltage threshold to turn off ? 4.3 5.3 v uv hyst under voltage hysteresis 0.5 ? 1.25 v t slp sleep mode time and fault reset 20 30 50 ms t rst time to reset the latched fault ? 50 ? s tj=25c t wke min minimum pulse width to wake up 2 ? ? s tpwr_on_rst power on reset time 5 8 15 s f dg ot over temperature diagnostic frequency ? 260 ? hz f dg oc over current diagnostic frequency 35 70 95 hz v dg dft dg voltage when fault ? ? 400 mv vin = 5v rin = 5k ? current sense characteristics -40c < tj < 150c, 6v < vcc < 18v (unless otherwise specified), rifb k=1k ? symbol parameter min. typ. max. units conditions i offset load current diagnostic offset - 2.7 0.62 4 a range 5a to 40a ratio (i load + i offset) / ifb 5400 6400 7200 ? range 5a to 40a ratio tc iload/ifbk variation over temperature - 3.5 - 1.5 % tj=-40c to 150c 2 guaranteed by design. downloaded from: http:///
auir3330s 7 www.irf.com ? 2012 international rectifier may 29, 2014 leads assignment part number auir3330s 1 : ifb 2 : in 3 : gnd 4 : vcc (tab) 5 : boot 6 : out 7 : out d2pak 7 leads downloaded from: http:///
auir3330s 8 www.irf.com ? 2012 international rectifier may 29, 2014 functional block diagram all values are typical internal diode schematic all values are typical boot downloaded from: http:///
auir3330s 9 www.irf.com ? 2012 international rectifier may 29, 2014 design: basic schematic with microprocessor the basic circuit is giving all the functionality to drive a 50a dc motor. rif b set both the current shutdown and the current feedback reading scale. the in signal provides the pwm frequency and dut y cycle order to the auir3330s. d1 is the free wheeling diode during pwm operation. as the equival ent circuit between vbat and C mot is 2 diode in series (the body diode of the auir3330s and d1), the system requir es t1, d2, r1 and r2 to sustain the reverse battery. (cf: typical connection with reverse battery protection). dc to 30 khz operation the auir3330s is able to operate in dc and high speed switching operation. to be able to switch at 30 khz, a bootstrap capacitor is used externally. the device integrates the power supply of the boots trap capacitor. in dc operation, when the capacitor is discharged, the charge pump maintains the device on. active di/dt control to reduce emi and switching losses the auir3330s includes a special gate drive, managing the mosfet di/dt controlled i nternally, by managing the gate voltage dynamically. this di/dt trade-off is set internally to an opti mum value, between power dissipation versus noise. this feature brings to the designer less emi versus switching losses. the system has three phases during the turn on sequence and three phases during the turn off sequence. first the driver injec ts a high current in the gate until the gate voltage reaches the vth. then it injects a low c urrent to control the di/dt value until the gate voltage reaches the miller plate. and after it injects a high current to fully turn on quickly the mosfet to reduce the dv time (reducing the switching losses). the turn off sequence is the same than the turn on but in the opposite direction: first reduce the dv time after control the di/dt and then discharge totally the ga te. ids vds phase 1 phase 2 phase 3 phase 4 phase 5 phase 6 phase 7 vth on switching losses switching losses igate vgs ids vds phase 1 phase 2 phase 3 phase 4 phase 5 phase 6 phase 7 vth on switching losses switching losses igate vgs phase 1 phase 2 phase 3 phase 4 phase 5 phase 6 phase 7 vth on switching losses switching losses igate vgs downloaded from: http:///
auir3330s 10 www.irf.com ? 2012 international rectifier may 29, 2014 sense load current feedback and programmable current shutdown the ifb pin allows an analog measurement of the load current and with an external res istor allows to program the over current shutdown level from 10a to 50a. the voltage threshold level of the ifb pin is internally set to 4v (see the formulas below). it is also possible to dynamically adjust the current s hutdown protection versus time by adding some external components. this protection is latched and turns off the output mosfe t without di/dt se quence to reduce the device and the application stress. the operating mode is rec overed after resetting by the sleep mode. min min _ min _ ratio ioffset appli imax gnd vifb rifb ? ? ? ? ? c ishtd ishd c ishd max ishd ? ? ? ? ? 150 max@ ; 25 max@ ; 40 max@ max ct ioffset ct ratio calculated rifb gnd vifb ct ishd ? ? ?? ? ?? ? ? ? ?? max@ max@ ) ( max _ max@ where: imax appli is the maximum application current ishtd max is the maximum output shutdown current rifb c t ratio c t ioffset iload c t vifb ? ? ? ? ? ? max@ max@ min@ rifb c t ratio c t ioffset iload c t vifb ? ? ? ? ? ? min@ min@ max@ internal over current shutdown the maximum current shutdown threshold value is internally fixed to 65a typ. this protection is latched and turns off the output mosfet without di/dt sequence to reduce the device and the application stress. the operating mode is recovered after resetting by the sleep mode. under voltage lock-out the auir3330s remains operational from uv off threshold. under this continuous volt age, the device will be locked until the voltage recovers the operating range, according to an internal hysteresis fixed to 0,5v min. the maximum rating voltage is given by the trench vdmos technology where the avalanche voltage is up to 43v typically. sleep mode and reset fault: the sleep mode is enabled if the in pin stay low (vin < v in slp) m ore than t slp time. the consumption in sleep mode is icc off. the auir3330s wakes up at first rise edge on the in pin (vin > v in slp). this mode allows resetting all the latched faults after trst time (cf. error! reference source not found. ). this filter time allows memorizing and maintaining the fault latched even if the power supply is removed (is o pulses latch protection). downloaded from: http:///
auir3330s 11 www.irf.com ? 2012 international rectifier may 29, 2014 c igen1 igen2 + - r1 r2 time to charge the capacitor and latch a fault (ige n1 + c) = 9s time to discharge the capacitor (igen2 + c) = 11ms ed_pch signal actif if vgs > vth sw1 vds_075 signal actif if vds < 0.75 v ovp_flt signal go to the latch block over-power protection the auir3330s have an internal over-power protection. this feature allows protecting the silicon device and the application against several critical issues: ? the bootstrap capacitor missing. ? abnormal leakage on the bootstrap capacitor. ? abnormal leakage on the power mosfet gate. ? very low impedance output short circuit. ? the time constant ign1 + c represent the thermal silicon time constant ? the time constant ign2 + c represent the thermal package time constant (t(ign2 + c) < t slp) ? igen1 is on if the gate voltage (of the output mosfet) is higher than its vth ? ign2 is always switching on. ? sw1 is close if the vbat C out voltage (vds) is lower than 0.75v when the output mosfet gate voltage reaches its output mosfet vth value, the c urrent generator igen1 start to charge the capacitor c. then three scenarios are possible: 1. the device turn on properly (vds < 0.75v) and the capacitor c is discharged by the switch sw1. the device i s ready for the next pulse. it is the normal case. 2. the device can not turn on properly (vds stay > 0.75v no capacitor reset) and the on time duration (duty cycle) is enough long to charge completely the capacitor c. the comparator detects the fault, stop the device and latch it. this fault could be reset by a sleep mode in input vgs voltage normal value vbat C voutput voltage (vds) ed_pch signal c capacitor voltage ovp_flt signal in input vgs voltage normal value vbat C voutput voltage (vds) ed_pch signal c capacitor voltage ovp_flt signal downloaded from: http:///
auir3330s 12 www.irf.com ? 2012 international rectifier may 29, 2014 3. the device can not turn on properly (vds stay > 0.75v no capacitor reset) but the on time duration (duty cycle) is not enough long to charge completely the capacitor c. so the fault is not detected by the comparator and it is not latched. but the picture of energy value dissipated by the mosfet during the almost turn on value is stored in the capacitor c. and at the next pulse the current generator igen1 resume to charge the capacitor until it reach the comparator value and latch the fault (this sequence could be on several pulse). it could be reset by a sleep mode. wake up sequence: the auir3330s has an internal power on reset. after waking it up by the in signal , the device waits for tpwron_rst before activating the output power mosfet. this time is required to char ge properly the bootstrap capacitor and to stabilize the internal power supply (cf. error! reference source not found. ). in input vgs voltage normal value vbat C voutput voltage (vds) ed_pch signal c capacitor voltage ovp_flt signal in input vgs voltage normal value vbat C voutput voltage (vds) ed_pch signal c capacitor voltage ovp_flt signal downloaded from: http:///
auir3330s 13 www.irf.com ? 2012 international rectifier may 29, 2014 in pin and digital diagnostic the in has two functions. in normal working condition, the output follows the in pin digital level. in latched fault condition (over current and over temperature shutdown), the in pin provides a digital feedback to the -processor. this digital diagnostic gives a different frequency signal according to the fault type. downloaded from: http:///
auir3330s 14 www.irf.com ? 2012 international rectifier may 29, 2014 bootstrap current measurement: switching time definition: as the opposite schematic shows, the dv/dt on & off and the td vout on & off switching time are measured at zero current value and with a simulated continuous conduction condition to avoid the di/dt impact (see also the chronogram above). due the inductive load, the drain current level impacts directly the delay to switch on the output voltage. so the output voltage duty cycle value changes with the current level. the output current duty cycle is higher than the output voltage duty cycle. the di/dt on limit value allows calculating the complete delay (here named tcdon and off ) to switch on the output voltage. all switching time values (except the td vout on & off parameters) coul d change with the application schematic (output snubber filter) and with the pcb layout. due to the internal pad, the input pin of the device has a parasitic capacitor cin. this capacitor and the rin (the recommended input resistor) create low pass filter and add an additional delay in the tdcon value. max min min _ _ _ on didt id on vout td tcdon ? ? min max max _ _ _ on didt id on vout td tcdon ? ? min min _ _ off vout td tcdoff ? max max _ _ off vout td tcdoff ? min max min _ tcdoff tdcon on tin ton ? ? ? max min max _ tcdoff tdcon on tin ton ? ? ? figure 1: switching time test circuit if b 1 in 2 gnd 3 vcc 4 boot 5 out 6 out2 7 tab 8 rin vcc 14v cboot 100n auir3330s(l) vout 15v 1 ohm downloaded from: http:///
auir3330s 15 www.irf.com ? 2012 international rectifier may 29, 2014 the minimum off time is the time to charge the bootstrap capacitor (recover the value before turn on the mosfet) during the high duty cycle operation. in the high duty cycle value condition, due to the di/dt driver, the internal gate continues to move whereas the output voltage doesnt go down under 6v (from vbat). so the device still need energy from the bootstrap capacitor but it can not charge it. when the bootstrap capacitor is discharged the circuit goes in linear mode and it is stopped by the over power protecti on. to avoid this situation, the micro- processor must turn fully on the device after the minimum off time is reached as i t is describe in the error! reference source not found. . the minimum off time is the minimum time to charge properly the bootstrap capacitor. downloaded from: http:///
auir3330s 16 www.irf.com ? 2012 international rectifier may 29, 2014 notes: decoupling capacitors: during the turn on and off phase, a high current (about a hundred ma ) flows through the vcc, the gnd and the boot. so the bootstrap capacitor and the decoupling must be as closer as possible. and it is forbidden to implement a resistor in series with the gnd pin. bootstrap capacitor charge: the power on reset is necessary to charge the bootstrap capacitor before turns on the power mosfet. the bootstrap capacitor gets its charge through the load. so the time to charge it depends of the load. but the power on reset doesnt monitor the bootstrap capacitor voltage. its time is set internally to allow starting the most of load without implement a special sequence: ? if the inductance of the load is lower than 500h, the power on reset is enough long to charge the bootstrap capacitor before turns on the power mosfet. v cboot charged v in v g power on reset time time to charge the bootstrap capacitor v cboot charged v in v g power on reset time time to charge the bootstrap capacitor vboot downloaded from: http:///
auir3330s 17 www.irf.com ? 2012 international rectifier may 29, 2014 ? if the inductance of the load is higher than 500h, the power on reset is not enough long to charge completely the bootstrap capacitor before turns on the power mosfet. so the micro-processor need to implement a special sequence to start the device without activates the output power mosfet. the p send one short pulse (twake min < short pulse < tpwr_on_rst) then wait for the bootstrap capacitor is totally charged and after provide the appropriate duty cycle. the bootstrap charge depends of the battery voltage, the bootstrap capacitor value and the inductance load value. output high dv/dt immunity system: the ir3330s has a high dv/dt immunity system. this function creates a negative gate biasing if the output voltage exceed 1.7v. so this device can be implemented in an h-bridge configuration. charged v boot v in v g power on reset time time to charge the bootstrap capacitor charged v v in v g power on reset time time to charge the bootstrap capacitor t wake min downloaded from: http:///
auir3330s 18 www.irf.com ? 2012 international rectifier may 29, 2014 open load detection function: the bootstrap regulator bias provides a current on device output. if the impedance between the output and ground is too high, after the turn off of the output mosfet, the output never reaches the ground. so it becomes possible to detect easily an open load condition when the device switches. in fully on condition the open load condition will detect by the current feedback (easy thanks to a high current condition). in the schematic below the component r7, q1, r8, d2 create the detection open load and provide a logic level diagnostic (open diag line) even if the battery in low voltage condition. d1mbr 3045ct cboot vcc +bat - mot gnd + mot vbat c2 100nf reverse battery protection 6v 6v 6v 6v out in ifbk gnd 8ma if b boot downloaded from: http:///
auir3330s 19 www.irf.com ? 2012 international rectifier may 29, 2014 emi consideration: at vehicle level: this is typical schematic of a high frequency power module in a vehicle (see: error! reference source not f ound. ) with the parasitic element create by the connection wire. between the bat tery and the module, the voltage is almost constant and the current switch at the application frequency. the power l ine creates a parasitic inductance with the current variation that generates voltage spike on the battery line . the level of this spike is directly linked to the conducted emissions level on the battery line. so c ontrol the current variation or the di/dt value reduces the conducted emi level on the battery line. in this case us e the auir3330 (active di/dt control) allows reducing significantly the conduced emi level. by analogy between the module and the load (see: error! reference source not found. ), due to the high inductance value of the motor, the current is almost constant and the voltage swi tches at the application frequency. due to the parasitic capacitor of the load each voltage variation creat e current spike on the load line. the level of this spike is directly linked to the radiated emissions level on the load line. so control the voltage variation or the dv/dt value reduces the radiated emi level. in this case use the auir3340 (active dv/dt control) allows reducing significantly the radiated emi level. downloaded from: http:///
auir3330s 20 www.irf.com ? 2012 international rectifier may 29, 2014 at module level: this typical schematic takes into account the parasitic elements created by the pcb tracks. its impedance is ? jl r ztrace ? ? . f ? ? 2 ? due to the ? jl element, the current variation in each line must be smooth to avoid the over voltage spikes. dt di l u l ? the impedance value of the parasitic element z3 and z6 are negligible compare to the motor impedance. so they dont have an important influence on the emi perturbation level. the parasitic component evaluation for dc and low frequency conditions are: ? s l r ? ? ? ?? ? ?? ? ? ? ? ? ? ? ? ? ? ? ) ( 22 .0 5.0 ) 2 ln( 10 2.0 6 l e d e d l l l where: ? ? : material resistivity cu = 1.7x10 -8 ? m ? l : track length in m ? s : track section in m2 (d x e) ? d : track width in m ? e : track thickness in m e figure 2: typical schematic of a power module downloaded from: http:///
auir3330s 21 www.irf.com ? 2012 international rectifier may 29, 2014 example: if the copper track characteristic between the mosfet pin and the free wheeling diode (parasitic element z2) is: ? l = 2 cm ? d = 1mm ? e = 35m so ? r = 0.9m ? ? l = 8nh if the mosfet switches without any slope control, the di/dt can reach 100a/s. t he overvoltage spike created by the current variation in the parasitic inductance is then ? u l = 8n * (100/1e-6) = 800mv now, if the mosfet slope is controlled and limited to 40a/s. then, the overvoltage spike created by the current variation in the parasitic inductance is: ? u l = 8n * (40/1e-6) = 320mv even if the pcb tracks are short, their parasitic impedances are not negligible in 20 khz application. limiting the current variation in these parasitic impedances reduces the overvoltage spikes s o the noise level. for further information about the pcb impedance effect see the application note named usin g the auir3330/40: pcb layout recommendation on the ir web site ( www.irf.com ). measured impact of the di/dt control: if the device detects an over current condition, it turns off the output mosfet without di/dt sequence to reduce application stress. so a simple test, consists to look at the waveform before (pul se1) and during the over current protection shutdown (pulse 2) to see the di/dt impact with the same condition (even if the dv/dt stay cons tant). ? black (ch1) = in_pwm 5v/div ? red (ch2) = drain current 10a/div ? green (ch3) = vds (drain source voltage) 5v/div ? blue (ch4) = vbat (battery voltage) in ac mode 1v/div pulse1 pulse2 downloaded from: http:///
auir3330s 22 www.irf.com ? 2012 international rectifier may 29, 2014 pulse1) oscilloscope screenshot in normal condition: the perturbation on the vbat line during the turn on is due to the discontinuity of the current in the diode and intensified by the current loop implemented between the input filter and the device to measure the drain current (di/dt). 2) oscilloscope screenshot during the over current shutdown: this screenshot is the next pulse after this one shows previously. the perturbation on the vbat line during the turn on is due to the discontinuity of the current in the diode and intensified by the current loop implemented between the input filter and the device to measure the drain current (di/dt) . remove the di/dt sequence only on the turn off increase strongly the perturbation le vel (more than 20db) on the power line even if the output dv/dt value doesnt change. note that in this example, the di/dt on sequence is still activated. by analogy with the turn off, we can easily guessed that the over all noise level will be increase if we could only keep the dv /dt on and remove the di/dt on. downloaded from: http:///
auir3330s 23 www.irf.com ? 2012 international rectifier may 29, 2014 parameters curves: downloaded from: http:///
auir3330s 24 www.irf.com ? 2012 international rectifier may 29, 2014 downloaded from: http:///
auir3330s 25 www.irf.com ? 2012 international rectifier may 29, 2014 downloaded from: http:///
auir3330s 26 www.irf.com ? 2012 international rectifier may 29, 2014 figure 20 : transient thermal impedance and model vs. time downloaded from: http:///
auir3330s 27 www.irf.com ? 2012 international rectifier may 29, 2014 case outline 7l d2pak downloaded from: http:///
auir3330s 28 www.irf.com ? 2012 international rectifier may 29, 2014 downloaded from: http:///
auir3330s 29 www.irf.com ? 2012 international rectifier may 29, 2014 part marking information ordering information base part number package type standard pack complete part number form quantity auir3330s d2 -pak-7- leads tube 50 auir3330s tape and reel left 800 AUIR3330STRL tape and reel right 800 auir3330strr downloaded from: http:///
auir3330s 30 www.irf.com ? 2012 international rectifier may 29, 2014 important notice unless specifically designated for the automotive market, international rectifier corpo ration and its subsidiaries (ir) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or services without notice. part numbers designated with the au prefix follow automotive industry and / or customer speci fic requirements with regards to product discontinuance and process change notification. all products are sold subject to irs terms and conditions of sale supplied at the time of order acknowledgment. ir warrants performance of its hardware products to the specifications applicabl e at the time of sale in accordance with irs standard warranty. testing and other quality control techniques are used to the extent ir deems necessary to support this warranty. except where mandated by government requirem ents, testing of all parameters of each product is not necessarily performed. ir assumes no liability for applications assistance or customer product design. custom ers are responsible for their products and applications using ir components. to minimize the risks with c ustomer products and applications, customers should provide adequate design and operating safeguards. reproduction of ir information in ir data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitation s, and notices. reproduction of this information with alterations is an unfair and deceptive business practice. ir is not responsible or liable for such altered documentation. information of third parties may be subject to additional restriction s. resale of ir products or serviced with statements different from or beyond the parameters stated by ir for that product or service voids all express and any implied warranties for the associated ir product or service and is an unfair and deceptive business practice. ir is not responsible or liable for any such statements. ir products are not designed, intended, or authorized for use as components in systems inte nded for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of the ir product could create a situation where personal injury or death may occur. should buyer purchase or use ir products for any such unintended or unauthorized applica tion, buyer shall indemnify and hold international rectifier and its officers, employees, subsidiaries, affi liates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arisi ng out of, directly or indirectly, any claim of personal injury or death associated with such uninte nded or unauthorized use, even if such claim alleges that ir was negligent regarding the design or manufacture of the product. only products certified as military grade by the defense logistics agency ( dla) of the us department of defense are designed and manufactured to meet dla military specifications required by certain military, aerospace or other applications. buyers acknowledge and agree that any use of ir products no t certified by dla as military- grade, in applications requiring military grade products, is solely at the buy ers own risk and that they are solely responsible for compliance with all legal and regulatory requirements in connection with s uch use. ir products are neither designed nor intended for use in automotive applications or envir onments unless the specific ir products are designated by ir as compliant with iso/ts 16949 requiremen ts and bear a part number including the designation au. buyers a cknowledge and agree that, if they use any non-designated products in automotive applications, ir will not be responsible for any failure to meet such requirements. for technical support, please contact irs technical assis tance center http://www.irf.com/technical-info/ world headquarters: 101 n. sepulveda blvd., el segundo, california 90245 tel: (310) 252- 7105 downloaded from: http:///

▲Up To Search▲

Price & Availability of AUIR3330STRL

	To Download AUIR3330STRL Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .